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general description the max1763 is a high-efficiency, low-noise, step-up dc-dc converter intended for use in battery-powered wireless applications. this device maintains exception- ally low quiescent supply current (110?) despite its high 1mhz operating frequency. small external compo- nents and a tiny package make this device an excellent choice for small hand-held applications that require the longest possible battery life. the max1763 uses a synchronous-rectified pulse- width-modulation (pwm) boost topology to generate 2.5v to 5.5v outputs from a wide range of input sources, such as one to three alkaline or nicd/nimh cells or a single lithium-ion (li+) cell. maxim's propri- etary idle mode circuitry significantly improves effi- ciency at light load currents while smoothly transitioning to fixed-frequency pwm operation at higher load cur- rents to maintain excellent full-load efficiency. low- noise, forced-pwm mode is available for applications that require constant-frequency operation at all load currents. the max1763 may also be synchronized to an external clock to protect sensitive frequency bands in communications equipment. the max1763 includes an on-chip linear gain block that can be used to build a high-power external linear regulator or as a low-battery comparator. soft-start and current limit functions permit optimization of efficiency, external component size, and output voltage ripple. the max1763 is available in a space-saving 16-pin qsop package or a high-power (1.5w) 16-pin tssop- ep package. features ? up to 94% efficiency ? +0.7v to +5.5v input voltage range ? 1.1v guaranteed startup input voltage ? up to 1.5a output ? fixed 3.3v output or adjustable (2.5v to 5.5v) ? 1mhz pwm synchronous-rectified topology ? 1a logic-controlled shutdown ? analog gain block for linear-regulator or low- battery comparator ? adjustable current limit and soft-start ? 1.5w tssop package available max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter ________________________________________________________________ maxim integrated products 1 pin configuration 19-1698; rev 2; 4/11 ordering information + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad idle mode is a trademark of maxim integrated products. part temp range pin-package max1763 eee+ -40? to +85? 16 qsop max1763eue+ -40? to +85? 16 tssop-ep* digital cordless phones pcs phones wireless handsets hand-held instruments palmtop computers personal communicators typical operating circuit on off pwm off on onb ona lx pout out clk/sel ao gnd pgnd fb iset ref max1763 or normal ain lbi or gain block input 1.5 h in 0.7v to 5.5v lbo or gain block output out 3.3v at 1.5a ________________________applications 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 ona onb pout lx pout pgnd lx pgnd clk/sel top view max1763 qsop tssop-ep iset ref out gnd fb ain ao for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (clk/sel = onb = fb = pgnd = gnd, iset = ref, out = pout, v ona = v ain = v out = 3.6v, t a = 0? to +85? , unless other- wise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ona, onb , ao, out to gnd.......................................0.3v, +6v pgnd to gnd.....................................................................?.3v lx to pgnd ............................................-0.3v to (v pout + 0.3v) clk/sel, ref, fb, iset, pout, ain to gnd.........................................-0.3v to (v out + 0.3v) pout to out ......................................................................?.3v continuous power dissipation 16-pin qsop (derate 8.7mw/? above +70?)...........667mw 16-pin tssop-ep (derate 19mw/? above +70?) ...........1.5w operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? soldering temperature (reflow) .......................................+260? parameter conditions min typ max units dc-dc converter input voltage range (note 1) 0.7 5.5 v minimum startup voltage (note 2) i load < 1ma, t a = +25? 0.9 1.1 v temperature coefficient of startup voltage i load < 1ma -2 mv/? frequency in startup mode v out = 1.5v 125 500 1000 khz internal oscillator frequency clk/sel = out 0.8 1 1.2 mhz oscillator maximum duty cycle (note 3) 80 86 90 % external clock frequency range 0.5 1.2 mhz output voltage v fb < 0.1v, clk/sel = out, includes load regulation for 0 < i lx < 1.1a 3.17 3.3 3.38 v fb regulation voltage adjustable output, clk/sel = out, includes load regulation for 0 < i lx < 1.1a 1.215 1.245 1.270 v fb input current v fb = 1.35v 0.01 100 na load regulation clk/sel = out, 0 < i lx < 1.1a -1.0 % output voltage adjust range 2.5 5.5 v output voltage lockout threshold (note 4) rising edge 2.00 2.15 2.30 v iset input leakage current v iset = 1.25v 0.01 50 na supply current in shutdown v onb = 3.6v, v ona = 0v 1 10 ? no-load supply current, low- power mode (note 5) clk/sel = gnd, ain = out 110 200 ? no-load supply current, low- noise mode clk/sel = out 2.5 ma gain block supply current v ain < (v out - 1.4v), gain block enabled 25 50 ?
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter _______________________________________________________________________________________ 3 electrical characteristics (continued) (clk/sel = onb = fb = pgnd = gnd, iset = ref, out = pout, v ona = v ain = v out = 3.6v, t a = 0? to +85? , unless other- wise noted. typical values are at t a = +25?.) parameter conditions min typ max units dc-dc switches pout leakage current v lx = 0v, v out = 5.5v 0.1 10 ? lx leakage current v lx = v onb = v out = 5.5v, v ona = 0v 0.1 10 ? n channel 0.075 0.13 switch on-resistance p channel 0.13 0.25 n-channel current limit 2.0 2.5 3.4 a p-channel turn-off current clk/sel = gnd 10 120 240 ma reference reference output voltage i ref = 0a 1.230 1.250 1.270 v reference load regulation -1? < i ref < 50? 5 15 mv reference supply rejection 2.5v < v out < 5v 0.2 5 mv gain block ain reference voltage i ao = 20? 910 938 970 mv ain input current v ain = 1.5v ?.01 ?0 na transconductance v ao = 1v, 10? < i ao < 100? 5 10 16 ms ao output low voltage v ain = 0.5v, i ao = 100? 0.1 0.4 v ao output high leakage v ain = 1.5v, v ao = 5.5v 0.01 1 a gain-block enable threshold (v out - v ain ) (note 6) 1.4 v gain-block disable threshold (v out - v ain ) (note 6) 0.2 v logic inputs clk/sel input low level 2.5v v out 5.5v (0.2) v out v clk/sel input high level 2.5 v v out 5.5v (0.8) v out v 1.1 v v out 1.8v 0.2 ona and onb input low level (note 7) 1.8 v v out 5.5v 0.4 v 1.1 v v out 1.8v v out - 0.2v ona and onb input high level (note 7) 1.8 v v out 5.5v 1.6 v input leakage current clk/sel, ona, onb 0.01 1 a minimum clk/sel pulse width 100 ns maximum clk/sel rise/fall time 100 ns
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter 4 _______________________________________________________________________________________ electrical characteristics (clk/sel = onb = fb = pgnd = gnd, iset = ref, out = pout, v ona = v ain = v out = 3.6v, t a = -40? to +85? , unless other- wise noted.) (note 8) parameter conditions min max units dc-dc converter input voltage range (note 1) 5.5 v m i ni m um s tartup v ol tag e ( n ote 2) i load < 1ma, t a = +25? 1.1 v frequency in startup mode v out = 1.5v 125 1000 khz internal oscillator frequency clk/sel = out 0.75 1.25 mhz oscillator maximum duty cycle (note 3) 80 91 % e xter nal c l ock fr eq uency rang e 0.6 1.2 mhz output voltage v fb < 0.1v, clk/sel = out, includes load regulation for 0 < i lx < 1.1a 3.17 3.38 v fb regulation voltage adjustable output, clk/sel = out, includes load regulation for 0 < i lx < 1.1a 1.215 1.270 v fb input current v fb = 1.35v 100 na output voltage adjust range 2.5 5.5 v output voltage lockout threshold (note 4) rising edge 2.00 2.30 v iset input leakage current v iset = 1.25v 50 na supply current in shutdown v onb = 3.6v, v ona = 0v 10 ? no-load supply current, low- power mode (note 5) clk/sel = gnd, ain = out 200 ? gain block supply current v ain < (v out - 1.4v), gain block enabled 50 ? dc-dc switches pout leakage current v lx = 0v, v out = 5.5v 10 ? lx leakage current v lx = v onb = v out = 5.5v, v ona = 0v 10 ? n-channel 0.13 switch on-resistance p-channel 0.25 n-channel current limit 2.0 3.4 a p-channel turn-off current clk/sel = gnd 10 240 ma reference reference output voltage i ref = 0a 1.220 1.270 v reference load regulation -1? < i ref < 50? 15 mv reference supply rejection 2.5v < v out < 5v 5 mv gain block ain reference voltage i ao = 20? 910 970 mv ain input current v ain = 1.5v ?0 na transconductance v ao = 1v, 10? < i ao < 100? 5 16 ms ao output low voltage v ain = 0.5v, i ao = 100? 0.4 v ao output high leakage v ain = 1.5v, v ao = 5.5v 1 a
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter _______________________________________________________________________________________ 5 electrical characteristics (continued) (clk/sel = onb = fb = pgnd = gnd, iset = ref, out = pout, v ona = v ain = v out = 3.6v, t a = -40? to +85? , unless other- wise noted.) (note 8) parameter conditions min max units logic inputs gain-block enable threshold (v out - v ain ) (note 6) 1.4 v gain-block disable threshold (v out - v ain ) (note 6) 0.2 v clk/sel input low level 2.5 v v out 5.5v (0.2) v out v clk/sel input high level 2.5 v v out 5.5v (0.8) v out v 1.1 v v out 1.8v 0.2 ona and onb input low level (note 7) 1.8 v v out 5.5v 0.4 v 1.1 v v out 1.8v v out - 0.2v ona and onb input high level (note 7) 1.8v v out 5.5v 1.6 v input leakage current clk/sel, ona, onb 1a note 1: operating voltage. because the regulator is bootstrapped to the output, once started, the max1763 will operate down to 0.7v input. for conditions where v in might exceed the set v out , or where v out is set above 4v, an external schottky diode must be connected from lx to pout. note 2: startup is tested with the circuit of figure 2. note 3: defines low-noise mode maximum step-up ratio. note 4: the regulator is in startup mode until this voltage is reached. do not apply full load current until the output exceeds 2.3v. note 5: supply current from the 3.3v output is measured between the 3.3v output and the out pin. this current correlates directly to the actual battery-supply current, but is reduced in value according to the step-up ratio and efficiency. the gain block is disabled. note 6: connect ain to out to disable gain block. note 7: ona and onb have hysteresis of approximately 0.15 ? v out . note 8: specifications to -40? are guaranteed by design and not production tested.
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter 6 _______________________________________________________________________________________ typical operating characteristics (circuit of figure 2, v in = +3.6v, v out = +5v, t a = +25?, unless otherwise noted.) 100 0 0.001 0.01 0.1 1 10 efficiency vs. output current (v out = 3.3v) 20 max1763 toc01 output current (a) efficiency (%) 40 60 80 70 50 30 10 90 a b c a: v in = 2.4v b: v in = 1.2v c: v in = 0.9v = normal mode = fpwm mode 100 0 0.001 0.01 0.1 1 10 efficiency vs. output current (v out = 5v) 20 max1763 toc02 output current (a) efficiency (%) 40 60 80 70 50 30 10 90 a b c a: v in = 3.6v b: v in = 2.4v c: v in = 1.2v = normal mode = fpwm mode 0 1.0 0.5 2.0 1.5 2.5 3.0 0.8 2.4 1.6 3.2 4.0 maximum output current vs. input voltage max1763 toc03 input voltage (v) output current (a) v out = 3.3v v out = 5v 0.1 0.0001 01 3 5 no-load input vs. input voltage 0.001 0.01 max1763 toc04 input voltage (v) input current (a) 24 = input voltage increasing = input voltage decreasing 10 0.1 046 1 input voltage (v) shutdown current ( a) 2 shutdown current vs. input voltage 1 3 5 max1763 toc05 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 -40 -15 10 35 60 85 internal oscillator frequency vs. temperature max1763 toc06 temperature ( c) frequency (mhz) v in = 3.6v, v out = 5v v in = 2.4v, v out = 3.3v 0.6 1.6 1.1 2.6 2.1 3.6 3.1 4.1 0.001 0.1 0.01 1 10 startup voltage vs. output current max1763 toc07 output current (a) startup voltage (v) 0 1.0 0.5 2.0 1.5 2.5 3.0 0 0.6 0.8 0.2 0.4 1.0 1.2 1.4 peak inductor current vs. v iset max1763 toc08 iset voltage (v) peak inductor current (a) heavy-load switching waveforms max1763 toc09 400ns/div a b c v in = 2.4v, v out = 3.3v, i out = 1.5a a: inductor current, 500ma/div b: v lx , 2v/div c: v out , 100mv/div, ac coupled
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter _______________________________________________________________________________________ 7 light-load switching waveforms max1763 toc10 200ns/div a b c v in = 1.1v, v out = 3.3v, i out = 20ma a: lx node, 5v/div b: inductor current, 0.1a/div, ac coupled c: output ripple, 0.1v/div, ac coupled load-transient response max1763 toc11 100 s/div a b v in = 2.4v, v out = 3.3v, i out = 0.2a to 1.35a a: i out , 0.5a/div b: v out , 100mv/div, ac-coupled line-transient response max1763 toc12 40 s/div a b v in = 2.4v to 1.4v, i out = 70ma a: v in , 1v/div b: v out , 5mv/div, ac-coupled power-on delay max1763 toc13 100 s/div ona 5v/div i in 0.5a/div v out 2v/div i l = 10ma startup waveforms no soft-start max1763 toc14 2ms/div v in = 1.2v, v out = 3.3v, r load = 3k v out 2v/div ona 5v/div i in 1a/div startup waveforms using soft-start max1763 toc15 2ms/div v in = 1.2v, v out = 3.3v, r ss = 510k , c ss = 0.1 f, r load = 3k v out 2v/div ona 5v/div i in 1a/div 0.01 10 1 0.1 noise spectrum 8 2 0 6 4 max1763 toc16 frequency (mhz) noise (mv rms ) v in = 2.4v v out = 3.3v typical operating characteristics (continued) (circuit of figure 2, v in = +3.6v, v out = +5v, t a = +25?, unless otherwise noted.)
max1763 detailed description the max1763 is a highly-efficient, low-noise power supply for portable rf and hand-held instruments. it combines a boost switching regulator, n-channel power mosfet, p-channel synchronous rectifier, preci- sion reference, shutdown control, and a versatile gain block (figure 1). the dc-dc converter boosts a one-cell to three-cell bat- tery voltage input to a fixed 3.3v or adjustable voltage between 2.5v and 5.5v. an external schottky diode is required for output voltages greater than 4v. the max1763 guarantees startup with an input voltage as low as 1.1v and remains operational down to an input of just 0.7v. it is optimized for use in cellular phones and other applications requiring low noise and low quiescent current for maximum battery life. it features constant-fre- quency (1mhz), low-noise pwm operation with up to 1.5a output capability. a clk input allows frequency synchronization to control the output noise spectrum. see table 1 for typical available output current. 1.5a, low-noise, 1mhz, step-up dc-dc converter 8 _______________________________________________________________________________________ pin description pin name function 1 ona on control input. when ona = high or onb = low, the ic turns on. connect ona to out for normal operation (table 3). 2 iset n-channel current limit control. for maximum current limit, connect to ref. to reduce current, supply a voltage between ref and gnd by means of a resistive voltage-divider. if soft-start is desired, connect a capacitor from iset to gnd. when ona = low and onb = high, or v ref < 80% of nominal value, an on-chip switched resistor (100k typ) discharges this pin to gnd. 3 ref 1.250v voltage reference bypass pin. connect a 0.22? ceramic bypass capacitor to gnd. up to 50? of external ref load current is allowed. 4 gnd ground. connect to pgnd with short trace. 5fb dc-dc converter feedback input. to set fixed output voltage of +3.3v, connect fb to ground. for adjustable output of 2.5v to 5.5v, connect to a resistive divider placed from out to gnd. fb set point is 1.245v (figure 6). 6 out ic power, supplied from the output. bypass to gnd with a 1.0? ceramic capacitor, and connect to pout with a series 4.7 resistor (figure 2). 7 ain gain-block input. the nominal transconductance from ain to ao is 10ms. an external p-channel pass device can be used to build a linear regulator. the gain block can also be used as a low-battery comparator with a threshold of 0.938v. the gain block and its associated quiescent current are disabled by connecting ain to out. 8ao gain-block output. this open-drain n-channel output sinks current when v ain < (0.75)(v ref ). ao is high-z when the device is shut down, or when ain = out. 9 clk/sel clock input for the dc-dc converter. also serves to program the operating mode of the switcher as follows: clk/sel = lo: normal; operates at a fixed frequency, automatically switching to low-power mode if load is minimized. clk/sel = hi: forced pwm mode; operates in low-noise, constant-frequency mode at all loads. clk/sel = clocked: forced pwm mode with the internal oscillator synchronized to clk in 500khz to 1200khz range. 10, 12 pgnd source of n-channel power mosfet switch. connect both pgnd pins together close to the device. 11, 14 lx inductor connection. connect the lx pins together close to the device. 13, 15 pout power output. p-channel synchronous rectifier source. 16 onb off control input. when onb = high and ona = low, the ic is off. connect onb to gnd for normal operation (table 3). ep exposed pad (tssop only). connect ep to a large ground plane to maximize thermal performance.
in its normal mode of operation (clk/sel = low), the max1763 offers fixed-frequency pwm operation through most of its load range. at light loads (less than 25% of full load), the device automatically optimizes efficiency by switching only as needed to supply the load. shutdown reduces quiescent current to just 1?. figure 2 shows the standard application circuit for the max1763. (an external schottky diode is needed for output voltages greater than 4v, or to assist low-voltage startup.) additional features include synchronous rectification for high efficiency and increased battery life, and a gain block that can be used to build a linear regulator using an external p-channel mosfet pass device. this gain block can also function as a voltage-monitoring com- parator. the max1763 is available in a 16-pin qsop package or a 1.5w 16-pin tssop-ep package for high- temperature or high-dissipation applications. max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter _______________________________________________________________________________________ 9 figure 1. functional diagram figure 2. pfm/pwm automode connection gain block ao n ain 2.15v ic power 1.25v dual mode/ fb reference undervoltage lockout startup oscillator 1mhz oscillator controller p n en d en pout lx pgnd osc mode fb en q q q ref fb iset gnd clk/sel on rdy ref 0.938v onb ona out max1763 iset gnd pgnd ao pout out ain lx d1 mbr0520l v in 0.7v to 5.5v c4 2 x 100 f out 3.3v l1 1.5 h fb ref clk/sel ona onb iset c3 0.22 f c2 1.0 f note: heavy lines indicate high-current paths. r5 4.7 max1763 c1 47 f table 1. typical available output current number of cells input voltage (v) output voltage (v) output current (ma) 1 nicd/nimh 1.2 3.3 675 2.4 3.3 1500 2 nicd/nimh 2.4 5.0 950 1 li+ 2.7 (min) 3.3 1300 1 li+ 2.7 (min) 5.0 1100 3 nicd/nimh 3.6 5.0 1600
max1763 step-up converter during dc-dc converter operation, the internal n-chan- nel mosfet switch turns on for the first part of each cycle, allowing current to ramp up in the inductor and store energy in a magnetic field. during the second part of each cycle, the mosfet turns off and inductor current flows through the synchronous rectifier to the output filter capacitor and the load. as the energy stored in the inductor is depleted, the current ramps down and the synchronous rectifier turns off, the n- channel fet turns on, and the cycle repeats. at light loads, depending on the clk/sel pin setting, output voltage is regulated using either pwm or by switching only as needed to service the load (table 2). normal operation pulling clk/sel low selects the max1763? normal operating mode. in this mode, the device operates in pwm when driving medium to heavy loads, and at light loads only, switches as needed. this optimizes efficien- cy over the widest range of load conditions. in normal operation mode, the output voltage regulates 1% higher than in forced-pwm mode. see efficiency vs. load current in the typical operating characteristics section. forced-pwm operation when clk/sel is high, the max1763 operates in a low- noise forced-pwm mode. during forced-pwm opera- tion, the max1763 switches at a constant frequency (1mhz) and modulates the mosfet switch pulse width to control the power transferred per cycle and regulate the output voltage. switching harmonics generated by fixed-frequency operation are consistent and easily fil- tered. see the noise spectrum plot in the typical operating characteristics . synchronized-pwm operation in a variation of forced-pwm mode, the max1763 can be synchronized to an external frequency by applying a clock signal to clk/sel. this allows the user to choose an operating frequency (from 500khz to 1.2mhz) to avoid interference in sensitive applications. for the most noise-sensitive applications, limit the external synchronization signal duty cycle to less than 10% or greater than 90%. this eliminates the possibility that noise from the power switching will coincide with the synchronization signal. if the synchronization signal edge falls on the power switching edge, a slight fre- quency jitter may occur. synchronous rectifier the max1763 features an internal 130m p-channel syn- chronous rectifier to enhance efficiency. synchronous rectification provides a 5% efficiency improvement over similar boost regulators that rely on diode rectifiers. in pwm mode, the synchronous rectifier is turned on during the second half of each switching cycle. in low-power mode, an internal comparator turns on the synchronous rectifier when the voltage at lx exceeds the boost regula- tor output and turns it off when the inductor current drops below 120ma. when setting output voltages greater than 4v, an external 0.5a schottky diode must be connected in parallel with the on-chip synchronous rectifier. low-voltage startup oscillator the max1763 uses a cmos low-voltage startup oscil- lator for a 1.1v guaranteed minimum startup input volt- age. at startup, the low-voltage oscillator switches the n-channel mosfet until the output voltage reaches 2.15v. above this level, the normal feedback and con- trol circuitry take over. once the device is in regulation, it can operate down to 0.7v input because internal power for the ic is derived from the output through the out pin. do not apply full system load until the output exceeds 2.3v. shutdown, ona, onb ona and onb turn the max1763 on or off. when ona = 1 or onb = 0, the device is on. when ona = 0 and onb = 1, the device is off (table 3). logic high on control can be implemented by connecting onb high and using ona for the control input. momentary one- pushbutton on/off control is described in the applications information section. both ona and onb have approximately (0.15 ? v out )v of hysteresis. reference the max1763 has an internal 1.250v reference. connect a 0.22? ceramic bypass capacitor to gnd within 0.2in (5mm) of the ref pin. ref can source up to 50? of external load current. gain block the max1763 gain block can function as a power-ok comparator or can be used to build a linear regulator 1.5a, low-noise, 1mhz, step-up dc-dc converter 10 ______________________________________________________________________________________ table 2. selecting the operating mode clk/sel mode features 0 normal operation high efficiency at all loads. fixed frequency at all but light loads. 1 forced pwm low noise, fixed frequency at all loads. external clock 500khz to 1.2mhz s ynchr oni zed p wm low noise, fixed frequency at all loads.
using an external p-channel mosfet pass device. the gain-block output is a single-stage transconductance amplifier that drives an open-drain n-channel mosfet. the transconductance (g m ) of the entire gain-block stage is 10ms. the internal gain block amplifies the dif- ference between ain and the internal 0.938v reference. to provide a power-ok signal, connect the gain-block input, ain, to an external resistor-divider (figure 3). the input bias current into ain is less than 30na, allowing large-value divider resistors without sacrificing accura- cy. connect the resistor voltage-divider as close to the ic as possible, within 0.2in (5mm) of ain. choose an r4 value of 270k or less, then calculate r3 using: r3 = r4((v trip / v ain ) - 1) where v ain is 0.938v. figures 4 and 5 show the gain block used in a linear- regulator application. the output of an external p-chan- nel pass element is compared to an internal 0.938v reference. the difference is amplified and drives the gate of the pass element. use a logic-level pfet, such as fairchild? nds336p (r ds(on) = 270m ). when the linear-regulator output voltage is in regulation, the mosfet will not be full on; thus, the on-resistance will not be important. however, if the linear regulator is used in dropout, the mosfet on-resistance will determine the dropout voltage (v dropout = i out ? r ds(on) ). if a lower r ds(on) pfet is used, increase the linear-regula- tor output filter capacitance to maintain stability. max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter ______________________________________________________________________________________ 11 figure 3. using the gain block as a power-ok comparator table 3. on/off logic control ona onb max1763 00on 0 1 off 10on 11on max1763 pout ao ain r6 150k r3 r4 power-ok output to v in or v out gnd pgnd ao pout out lx c1 47 f boost output c out 47 f linear- regulated output r g 20k r5 4.7 c2 1.0 f 0.22 f v in 1.8v to 5.5v l1 1.5 h fb c4 220 f ref ain r3 r4 r2 30k signal ground power ground r1 max1763 iset clk/sel ona onb p gnd pgnd pout out lx c4 220 f r5 4.7 c2 1 f c3 0.22 f v in 1.5 h fb c out 47 f c1 47 f ref ain r3 165k r4 100k max1763 iset clk/sel ao onb ona mbro520l 3.3v 2.5v r g 20k figure 4. using the gain block as a linear regulator from the boosted output voltage figure 5. powering a gain-block linear regulator from the input voltage
max1763 the output capacitance can be determined by the function: c out [ (v ref / v out ) ? g m ? g fs ? c g ? (r g ? 2) ] and c out 10 ? [ (v ref / [v out ? gbp]) ? g m ? g fs ? r g ] where v ref is the 0.983v reference voltage, g m is the 10ms internal amplifier transconductance, g fs is the external mosfet transconductance, r g is the gate- source resistor, and gbp is the gain-bandwidth prod- uct of the internal gain block, 63mrad/s. __________________ _ design procedure setting the output voltage for a fixed 3.3v output, connect fb to gnd. to set the output voltage between 2.5v and 5.5v, connect a resis- tor voltage-divider to fb from out to gnd (figure 6). the input bias current into fb is less than 100na, allow- ing large-value divider resistors without sacrificing accuracy. connect the resistor voltage-divider as close to the ic as possible, within 0.2in (5mm) of fb. choose r2 of 30k or less, then calculate r1 using: r1 = r2((v out / v fb ) - 1) where v fb , the boost-regulator feedback set point, is 1.245v. setting the switch current limit and soft-start the iset pin adjusts the inductor peak current and can also be used to implement soft-start. with iset con- nected to ref, the inductor current limits at 2.5a. with iset connected to a resistive divider set from ref to gnd, the current limit is reduced according to: i lim = 2.5(v iset / 1.25) [a] implement soft-start by placing a resistor from iset to ref (>300k ) and a capacitor from iset to gnd. in shutdown, iset is discharged to gnd through an inter- nal 100k resistor. as the capacitor voltage rises, the output current is allowed to increase, and the output voltage rises. the speed at which the output rises is determined by the soft-start time constant: t ss = r ss c ss where r ss 300k. both features may be implemented simultaneously by placing a capacitor across the lower resistor of the cur- rent-limiting resistive divider (figures 7 and 8). package selection the max1763 is available in two packages, a 16-pin qsop and a 16-pin tssop-ep. since the max1763 has excellent efficiency, most applications are well served by the qsop package. if the application requires high power dissipation, or operation in a high ambient temperature, choose the tssop-ep package. the tssop-ep is equipped with an exposed metal pad on its underside for soldering to grounded circuit board copper. this reduces the junction-to-case thermal resistance of the package from +115?/w for qsop to +53?/w for the tssop-ep. 1.5a, low-noise, 1mhz, step-up dc-dc converter 12 ______________________________________________________________________________________ max1763 out fb r2 r1 r1 = r2 ( - 1 ) v out v fb , v fb = 1.245v, r2 30k max1763 ref iset r ss c ss 0.22 f i lim = 2.5a t ss = r ss c ss max1763 ref iset r ss1 c ss 0.22 f i lim = 2.5a ( ) r ss2 r ss1 + r ss2 t ss = (r ss1 r ss2 )c ss r ss2 figure 7. soft-start with maximum switch limit current figure 8. soft-start with reduced switch limit current figure 6. connecting resistors for external feedback
at an ambient temperature of +70?, continuous power dissipation for the qssop package is 667mw, while the tssop-ep can dissipate 1.5w. a first-order esti- mate of power dissipation can be determined by calcu- lating the output power delivered to the load (e.g., 3.3v ? 1a = 3.3w). at the input voltage used, find the effi- ciency from the typical operating characteristics graphs (e.g., 87%). the estimated power dissipation in the max1763 is then: (100% - %efficiency) ? output power. the example would have: 13% ? 3.3w = 0.43w, allowing the qsop package (667mw) to be used. for higher ambient temperature, higher output power, or a lower-efficiency operating point, the tssop-ep pack- age (1.5w) may be necessary. for detailed package mechanical information, see the package outline draw- ings at the end of this data sheet. inductor selection the max1763? high switching frequency allows the use of a small 1.5? surface-mount inductor. the cho- sen inductor should generally have a saturation current rating exceeding the n-channel switch current limit; however, it is acceptable to bias the inductor current into saturation by as much as 20% if a slight reduction in efficiency is acceptable. inductors rated for lower peak current may be used if iset is employed to reduce the peak inductor current (see setting the switch current limit and soft-start ). for high efficiency, choose an inductor with a high-frequency ferrite core material to reduce core losses. to minimize radiated noise, use a toroid or shielded inductor. see table 4 for suggested components and table 5 for a list of compo- nent suppliers. connect the inductor from the battery to the lx pins as close to the ic as possible. external diode for conditions where v in might exceed the set v out , or where v out is set above 4v, an external schottky diode must be connected from lx to pout in parallel with the on-chip synchronous rectifier. see d1 in figure 2. the diode should be rated for 0.5a. representative devices are motorola mbr0520l, nihon ep05q03l, or generic 1n5817. this external diode is also recommended for applications that must start with input voltages at or below 1.8v. the schottky diode carries current during both startup and after the synchronous rectifier turns off. thus, its current rating only needs to be 500ma even if the inductor current is higher. connect the diode as close to the ic as possible. do not use ordi- nary rectifier diodes; their slow switching speeds and long reverse-recovery times render them unacceptable. for circuits that do not require startup with inputs below 1.8v, and have an output of 4v or less, no external diode is needed. input and output capacitors choose input and output capacitors that will service the input and output peak currents with acceptable voltage ripple. choose input capacitors with working voltage rat- ings over the maximum input voltage, and output capaci- tors with working voltage ratings higher than the output. a 220?, low equivalent-series-resistance (esr) (less than 100m ) capacitor is recommended for most applica- tions. alternatively, two 100? capacitors in parallel will reduce the effective esr for even better performance. the input capacitor reduces peak currents drawn from the input source and also reduces input switching noise. the input voltage source impedance determines the required size of the input capacitor. when operating directly from one or two nimh cells placed close to the max1763, use a single 47? low-esr input filter capac- itor. with higher impedance batteries, such as alkaline and li+, a higher value input capacitor may improve efficiency. sanyo poscap, panasonic sp/cb, and kemet t510 are good low-esr capacitors (tables 4 and 5). low- esr tantalum capacitors offer a good trade-off between price and performance. do not exceed the ripple cur- rent ratings of tantalum capacitors. avoid aluminum electrolytic capacitors; their high esr typically results in higher output ripple voltage. max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter ______________________________________________________________________________________ 13 table 5. component suppliers supplier phone avx usa: 843-448-9411 coilcraft usa: 847-639-6400 kemet usa: 810-287-2536 motorola usa: 408-629-4789 japan: 81-45-474-7030 sumida usa: 847-956-0666 japan: 011-81-3-3667-3302 note: please indicate that you are using the max1763 when contacting these component suppliers. table 4. component selection guide inductors capacitors diodes avx tps series kemet t510 series coilcraft lpt3305 sanyo poscap series motorola mbr0520l sumida panasonic sp/cb nihon ep10qy03
max1763 bypass components a few ceramic bypass capacitors are required for prop- er operation. bypass ref to gnd with 0.22?. also, bypass out to gnd with a 1? ceramic capacitor, and connect out to pout with a 4.7 resistor. each of these components should be placed as close to their respective ic pins as possible, within 0.2in (5mm). table 5 lists suggested suppliers. layout considerations high switching frequencies and large peak currents make pc board layout a critical part of design. poor design will cause excessive emi and ground bounce, both of which can cause instability or regulation errors by corrupting the voltage and current feedback signals. power components, such as the inductor, converter ic, and filter capacitors, should be placed as close together as possible, and their traces should be kept short, direct, and wide. keep the voltage feedback network very close to the ic, within 0.2in (5mm) of the fb pins. keep noisy traces, such as those from the lx pin, away from the voltage feedback networks and guarded from them using grounded copper. if an external rectifier is used, its traces must be kept especially short and use an absolute minimum of copper area to avoid excess capacitance that can slow the operation of the on-chip synchronous rectifier and actually reduce efficiency. refer to the max1763 ev kit for a full pc board example. the max1763 tssop-ep package features an exposed thermal pad on its underside. this pad lowers the package? thermal resistance by providing a direct thermal heat path from the die to the pc board. additionally, the ground pin (gnd) also channels heat. connect the exposed thermal pad and gnd to circuit ground by using a large pad or multiple vias to the ground plane. step-up/step-down applications in some battery-powered applications, the battery volt- age range overlaps the output voltage. in this case, depending on the battery voltage, the regulator will have to step the voltage up or down. to make a step- up/step-down regulator, use the gain block to make a linear regulator that follows the step-up converter. in this case, if the battery voltage is low, then the circuit will step up, and when the battery voltage is high, the linear regulator will drop the voltage. see the gain block section on how to use the gain block to make a linear regulator. when the output voltage is greater than the regulation voltage, then the synchronous rectifier will be held on, reducing the dropout, and thus increas- ing the efficiency when the battery voltage is close to, but slightly above, the regulation voltage. chip information substrate connected to gnd 1.5a, low-noise, 1mhz, step-up dc-dc converter 14 ______________________________________________________________________________________
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter ______________________________________________________________________________________ 15 note: the MAX1763EEE is a 16-pin qsop and does not have a heat slug. use the max1763eue for higher power dissipation. package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing per - tains to the package regardless of rohs status. package type package code outline no. land pattern no. 16 qsop e16+1 21-0055 90-0167 16 tssop-ep u16e+3 21-0108 90-0120
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter 16 ______________________________________________________________________________________ package information (continued) for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing per - tains to the package regardless of rohs status.
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter ______________________________________________________________________________________ 17 package information (continued) for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing per - tains to the package regardless of rohs status.
max1763 1.5a, low-noise, 1mhz, step-up dc-dc converter maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 2 4/11 added lead-free designation, added conditions for use when v in > v out , updated pin description section 1, 5, 8, 13

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